Fusion of fingerprint and iris recognition for embedded multimodal biometric system

A multimodal biometric system is considered to be more reliable for person identification. It uses multiple biometric credentials/traits to identify a person rather than a single biometric trait. It uses multiple sensors to acquire biometric traits. This system allows capturing either samples of multiple biometric traits or multiple samples of a single biometric trait. This system improves the accuracy and dependability by providing an optimal False Acceptance Rate (FAR) and False Rejection Rate (FRR). Hardware implementation of a multimodal biometric system, in resources-constrained embedded systems, poses great challenges. Although there has been a substantial amount of work on combining different biometrics for a variety of purposes, not much work has focused on the hardware implementation of the multimodal biometric system. The aim of this dissertation is to build a reliable multimodal biometric system that takes into account multiple constraints: low cost, real-time processing, hygienic, straightforward, user-friendly, limited memory, etc. To achieve this, we present a hardware architecture of a multimodal biometric system that massively exploits the inherent parallelism. The proposed system is based on multiple biometric fusions that use two biometric traits, fingerprint and iris. In fingerprint feature extraction, several challenges are addressed that directly affect the minutiae extraction process like fingerprint normalisation, scar removal, orientation estimation, fingerprint enhancement, binarization and thinning and feature extraction. In iris recognition, each individual block involved in feature extraction is optimised independently, including pupil segmentation, iris segmentation, normalisation and iris feature enhancement. After completing the software design, its hardware equivalent is implemented in VHDL. In both biometric identifiers, each sub-block operates in sequence. For example, in fingerprint identification, first normalisation is performed followed by image enhancement then binarization and thinning and finally feature extraction. This allows the hardware implementation to form a temporal parallelism. The temporal parallelism allows the design to be implemented component by component. Separate processors are used for each component to form a pipelined architecture for both biometrics. Finally, the extracted features are fused with matching-level fusion. To the best of the author’s knowledge, no other FPGA-based design that uses these two traits exists to date.